By Rino Micheloni
This e-book walks the reader throughout the subsequent step within the evolution of NAND flash reminiscence expertise, specifically the advance of 3D flash thoughts, within which a number of layers of reminiscence cells are grown in the similar piece of silicon. It describes their operating rules, equipment architectures, fabrication innovations and useful implementations, and highlights why 3D flash is a new technology.
After reviewing industry traits for either NAND and good kingdom drives (SSDs), the ebook digs into the main points of the flash reminiscence phone itself, overlaying either floating gate and rising cost seize applied sciences. there's a plethora of alternative fabrics and vertical integration schemes available in the market. New reminiscence cells, new fabrics, new architectures (3D Stacked, BiCS and P-BiCS, 3D FG, 3D VG, 3D complex architectures); essentially, every one NAND producer has its personal answer. bankruptcy three to bankruptcy 7 provide a extensive evaluate of ways 3D can materialize. The 3D wave is impacting rising thoughts in addition and bankruptcy eight covers 3D RRAM (resistive RAM) crosspoint arrays. Visualizing 3D buildings could be a problem for the human mind: this is often method some of these chapters include loads of bird’s-eye perspectives and go sections alongside the three axes.
The moment a part of the ebook is dedicated to different vital points, comparable to complex packaging know-how (i.e. TSV in bankruptcy nine) and blunder correction codes, that have been leveraged to enhance flash reliability for many years. bankruptcy 10 describes the evolution from legacy BCH to the latest LDPC codes, whereas bankruptcy eleven offers with probably the most contemporary developments within the ECC box. final yet no longer least, bankruptcy 12 appears to be like at 3D flash stories from a approach perspective.
Is 14nm the final step for planar cells? Can a hundred layers be built-in in the related piece of silicon? Is four bit/cell attainable with 3D? Will 3D be trustworthy adequate for firm and datacenter purposes? those are the various questions that this publication is helping answering by way of delivering insights into 3D flash reminiscence layout, procedure know-how and applications.
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Additional resources for 3D Flash Memories
To understand these new reliability problems, basic concepts of 3D NAND cells are briefly introduced in this section; for more details about each single 3D architecture please refer to Chaps. 4, 5, 6, and 7. In the following sections, the reliability issues affecting 3D devices will be discussed by reviewing the main problems experimentally observed in different 3D NAND arrays [20, 21]. The cross section diagram along a single WL plane of the 3D vertical channel NAND reported in Fig. 13 (left) is shown in Fig.
15 (left) shows a comparison between the GAA-CT cell (solid) and the planar CT cell (dashed), given the same thickness of gate dielectrics, in case of programming operation at VG = 12 V with neutral nitride. The energy band proﬁle Fig. 15 Comparison between a GAA-CT cell and a planar CT cell having the same thickness of the gate dielectrics in terms of energy-band proﬁle (left) and electric ﬁeld (right) during program, for VG = 12 V and neutral nitride  2 Reliability of 3D NAND Flash Memories 43 Fig.
9 Practical example comparing a 2 TB BYO SSD with a standard SSD cost NAND. Savings can be as much as 25–40 % for just the initial hardware cost (not including the additional operational and technical integration advantages). 3 Economics of SSD Controllers Throughout the previous section, we have alluded to the importance of using controllers with a flexible architecture to create customized BYO SSD’s or the spectrum of read to write intensive SSD products (product lines) using the same controller.
3D Flash Memories by Rino Micheloni